/* parasoft suppress item  MISRA2012-DIR-4_8 "Consider hiding implementation of structure" */
/**********************************************************************
* Copyright (C) 2012-2020 Cadence Design Systems, Inc.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
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* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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**********************************************************************
* WARNING: This file is auto-generated using api-generator utility.
*          api-generator: 12.02.13bb8d5
*          Do not edit it manually.
**********************************************************************
* Cadence Core Driver for LPDDR4_16Bit.
**********************************************************************/
#ifndef LPDDR4_STRUCTS_IF_H
#define LPDDR4_STRUCTS_IF_H

#include "cdn_stdtypes.h"
#include "lpddr4_if.h"
#ifdef __cplusplus
extern "C" {
#endif

/** @defgroup DataStructure Dynamic Data Structures
 *  This section defines the data structures used by the driver to provide
 *  hardware information, modification and dynamic operation of the driver.
 *  These data structures are defined in the header file of the core driver
 *  and utilized by the API.
 *  @{
 */

/**********************************************************************
* Structures and unions
**********************************************************************/
/**
 * Configuration of device.
 * Object of this type is used for probe and init functions.
 */
struct lpddr4_config_s {
	/** Base address of controller registers */
	struct lpddr4_ctlregs_s* ctlbase;
	/** Information/warning handler */
	lpddr4_infocallback infohandler;
	/** Controller interrupt handler */
	lpddr4_ctlcallback ctlinterrupthandler;
	/** PHY Independent Module interrupt handler */
	lpddr4_phyindepcallback phyindepinterrupthandler;
};

/**
 * Structure contains private data for Core Driver that should not be used by
 * upper layers. This is not a part of API and manipulating of those data may cause
 * unpredictable behavior of Core Driver.
 */
struct lpddr4_privatedata_s {
	/** Base address of controller registers */
	struct lpddr4_ctlregs_s* ctlBase;
	/** Information/warning handler */
	lpddr4_infocallback infoHandler;
	/** Controller interrupt handler */
	lpddr4_ctlcallback ctlInterruptHandler;
	/** PHY Independent Module interrupt handler */
	lpddr4_phyindepcallback phyIndepInterruptHandler;
};

/** Structure to contain debug information reported by the driver. */
struct lpddr4_debuginfo_s {
	/** PLL Lock error. */
	bool pllError;
	/** I/O calibration error. */
	bool ioCalibError;
	/** RX offset error. */
	bool rxOffsetError;
	/** CA training error. */
	bool caTraingError;
	/** Write levelling error. */
	bool wrLvlError;
	/** Gate Level error. */
	bool gateLvlError;
	/** Read Level error. */
	bool readLvlError;
	/** Write DQ training error. */
	bool dqTrainingError;
};

/** Frequency Set Point mode register values */
struct lpddr4_fspmoderegs_s {
	/** MR1 register data for the FSP. */
	uint8_t mr1Data_fN[LPDDR4_MAX_CS];
	/** MR2 register data for the FSP. */
	uint8_t mr2Data_fN[LPDDR4_MAX_CS];
	/** MR3 register data for the FSP. */
	uint8_t mr3Data_fN[LPDDR4_MAX_CS];
	/** MR11 register data for the FSP. */
	uint8_t mr11Data_fN[LPDDR4_MAX_CS];
	/** MR12 register data for the FSP. */
	uint8_t mr12Data_fN[LPDDR4_MAX_CS];
	/** MR13 register data for the FSP. */
	uint8_t mr13Data_fN[LPDDR4_MAX_CS];
	/** MR14 register data for the FSP. */
	uint8_t mr14Data_fN[LPDDR4_MAX_CS];
	/** MR22 register data for the selected frequency. */
	uint8_t mr22Data_fN[LPDDR4_MAX_CS];
};

/**
 *  @}
 */

#ifdef __cplusplus
}
#endif

#endif  /* LPDDR4_STRUCTS_IF_H */
